Single- and double-precision IEEE-754 floating-point unit
The GRFPU can be use stand-alone or attached to the LEON SPARC processor through the LEON FPU Control unit (GRFPC). The control unit receives SPARC FPU instructions (FPOP) from the LEON integer unit, and schedules them for execution by the FPU. The FPOPs are executed in parallel with other integer instructions, the LEON pipeline is only stalled in case of operand or resource conflicts. The GRFPC also includes the FPU register file, the processor floating-point status register (FSR) and a single-entry deferred trap queue. The GRFPC is available for LEON2, LEON2-FT and the upcoming LEON3 processor.
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IEEE-754 FPU IP
- ARC Fast FPU: IEEE-754 compliant half-, single- and double-precision scalar and SIMD floating point unit for ARC HS5x, HS5xD, and HS6x Processors
- RISC-V 64-bit Processor
- DSP Extention Superscalar Processor
- Compact, low-power 32-bit RISC CPU
- High-performance 32-bit RISC CPU
- MIPS proAptiv Superscalar Multiprocessor