Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k

Features

• Available for Free Download and Use
• Decrease of fabrication costs
• Up to 50% denser than traditional register file compilers!
• Ultra low dynamic power
• Low power architecture even at nominal voltage: Up to 50% less consuming than standard memory compilers available at 90 nm LP
• Low voltage capability: 30% additional power consumption savings when operating at 1.0 V +/-10%
• Byte write capability
• Flexible power routing: power ring or ring-less
• Low leakage
• Memory designed with HVt MOS for periphery and HVt bit-cell from foundry for memory core
• Data retention mode to divide leakage by 5 compared to standard stand by mode
• The Dolphin quality
• Complete mismatch validation of the memory architecture taking in account local and global dispersion
• Architecture designed to enable robust low voltage operation
• Optional BIST for industrial fabrication test of instances

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