400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Single Port SRAM compiler - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 k
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SRAM IP
- Memory (SRAM, DDR, NVM) encryption solution
- Complete Neural Processor for Edge AI
- Single Port SRAM Compiler GlobalFoundries 55LPx Ultra-high density, low power, up to 320K bits
- Intrinsic ID Zign® 100 - Software implementation of SRAM PUF
- Intrinsic ID Zign® 200 - Software implementation of SRAM PUF with symmetric cryptography
- Intrinsic ID Zign® 300 - Software implementation of SRAM PUF with symmetric & asymmetric cryptography + PKI