SLVS-EC Interface for FPGA
* Altera® FPGAs can receive signals directly from the SLVS-EC Interface.
* Compatible with the latest SLVS-EC Specification Version 3.0.
* Supports powerful De-Skew function. Enables board design without considering Skew that occurs between lanes.
* "Evaluation kit”(see below) is available for speedy evaluation at the actual device level.
View SLVS-EC Interface for FPGA full description to...
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Block Diagram of the SLVS-EC Interface for FPGA IP Core
![SLVS-EC Interface for FPGA Block Diagam](http://www.design-reuse.com/sip/blockdiagram/41052/20240527075410-main-SLVS-EC_V3_.png)
SLVS-EC interface IP
- Camera SLVS-EC v.2.0 5.0Gbps / MIPI D-PHY v2-1 4.5Gbps combo Receiver 4-Lane
- Camera SLVS-EC/MIPI D-PHY/sub-LVDS/CMOS1.8 combo Receiver 2.4G/2.5G/800Mbps/166MHz 8-Lane
- Multi-PHY Receiver Link Controller
- Camera SLVS-EC/sub-LVDS/CMOS1.8 combo Receiver 2.4G/800Mbps/166MHz 8-Lane
- Camera SLVS-EC/MIPI D-PHY/CMOS1.8 combo Receiver 2.4G/2.5G/166MHz 8-Lane
- SLVS-EC Receiver IP