English
Linear regulator with ultra low quiescent current for retention applications
You are here:
SM3 Crypto Accelerator
The EIP-52 SM3 Engine implements the SM3 hash algorithm. The accelerators include I/O registers, hash calculation cores, message padding logic, and data scheduling logic. Designed for fast integration, low gate count, and maximum performance, the SM3 Engine provides a reliable and cost-effective SM3 IP solution that is easy to integrate into SoC designs.
View SM3 Crypto Accelerator full description to...
- see the entire SM3 Crypto Accelerator datasheet
- get in contact with SM3 Crypto Accelerator Supplier
Sm3 IP
- Tunable HMAC accelerator - compliant with all hash functions (SHA1, SHA2, SM3, SHA3) - optional SCA protection
- Tunable SM3 accelerator
- SM3 Hash Engine
- Hash Crypto Engine
- Crypto Coprocessor (Standard)
- integrated Secure Element (iSE) for multiple applications - Hardware Security Module (HSM) - Security Enclave - Security Subsystem