SMIC 0.13um 1.2v/3.3v APLL

This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 100MHz to 300MHz (If the analog power drops to 2.5v, the VCO can not reach 300MHz and the highest frequency of PLL will be 200MHz). By setting DM[4:0] and DN[5:0] to different values according to different , FREFIN,FCLK will be locked at the multiples of input frequency.

• see the entire SMIC 0.13um 1.2v/3.3v APLL datasheet
• get in contact with SMIC 0.13um 1.2v/3.3v APLL Supplier