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SMIC 0.13um General Process, 1.2V/2.5V Standard Cell Library
VeriSilicon SMIC 0.13um High-Density Standard Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5V process, based on a nine track layout architecture.
The library supports most commonly used basic Boolean functions with multiple drive strengths. While satisfying the performance and power requirements, it was optimized for area efficiency.
The library supports most commonly used basic Boolean functions with multiple drive strengths. While satisfying the performance and power requirements, it was optimized for area efficiency.
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Standard Cell IP
- Standard Cell Libraries - GLOBALFOUNDRIES 22FDX
- 8 track thick oxide standard cell library at TSMC 90 - low leakage and direct battery connection (operating voltages from 1.08 V to 3.63 V)
- 10 track thick oxide standard cell library at TSMC 65 - low leakage and direct battery connection (operating voltages from 1.08 V to 3.63 V)
- 8 track thick oxide standard cell library at TSMC 90 - low leakage and direct battery connection (operating voltages from 1.08 V to 3.63 V)
- 9 track thick oxide standard cell library at TSMC 180 - low leakage and direct battery connection (operating voltages from 1.62 V to 3.63 V)
- 7 track Extra Low Consumption standard cell library with Dual voltage capability (1.8 V / 1.1 V)