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High-performance AES-GCM accelerator - optional SCA protection
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SMIC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon SMIC 0.15um LV High-Speed Synchronous Memory Compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.15um Logic Low Voltage 1P7M Salicide 1.2/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it was optimized for area efficiency.
VeriSilicon SMIC Synchronous Memory compiler uses four layers within the blocks and supports metal 4, 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it was optimized for area efficiency.
VeriSilicon SMIC Synchronous Memory compiler uses four layers within the blocks and supports metal 4, 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
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