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SMIC 0.18um PLL
Analog PLL suitable for high speed clock generation. High speed VCO can run around 100MHz. Set different value of DM(4:0) and DN(5:0) according to the different REFin frequency, BAKo will be locked at the rise edge of REFin and the output frequency (Cko) will be locked at the times of the input frequency.
Features
- Process: SMIC 0.18um 1P4M CMOS process
- Supply voltage: 3.3v, 1.8v
- Current: <8mA
- Reference Divider: 5bits, M=1~32
- Feedback Divider: 6bits, N=1~64
- VCO Frequency: 70MHz~140MHz
- Operating temperature: -40c ~ +25c ~ +85c
- Core Area: 808um x 261um
Deliverables
- Databook in electronic format
- Verilog models and Synopsys synthesis models
- Candence Silicon Ensenble Abstracts (LEF), Avanti! Apollo data, GDS II
- LVS netlist
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