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360 MHz Oscillator for SoC Integration and Hardware Security (22 nm, multiple clock outputs)
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SMIC 0.18umLL Single-Port/Dual-Port SRAM, Two-Port Register File and Diffusion ROM Compiler for Linux
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Memory Compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18um Logic Low Leakage 1P6M Salicide 1.8/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability.
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