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Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
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SMIC 65nm LL 1.2v/2.5v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 150MHz to 750MHz. By setting DM [3:0] and DN [7:0] to different values according to different CLKIN, CLKOUT will be locked at the multiples of input frequency.
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