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SMIC 90nmLL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler
VeriSilicon SMIC 90nm Low-Leakage Process Synchronous Memory Compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 90nm Logic Low-Leakage 1P9M Salicide 1.2/2.5(3.3)V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word length and bit length. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon SMIC 90nm Low-Leakage Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 6, 7, 8 or 9 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability
The compiler supports a comprehensive range of word length and bit length. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon SMIC 90nm Low-Leakage Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 6, 7, 8 or 9 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability
Features
- Low Leakage
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
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