Switching regulator, inductor-based, PWM mode, high efficiency
SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
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SSTL IP
- SSTL_15 / SSTL_18 Combo I/O Pad Set
- SSTL_ I/O Pad Set
- SSTL_15 / SSTL_18 Combo I/O Pad Set
- DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (in-line) - TSMC 40nm 40LP (CLN40lp)
- DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 80nm GC (CLN80GC)
- DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm G (CLN90G)