English
Switching regulator, inductor-based, PWM mode, high efficiency
You are here:
SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
The DDR2 / DDR3 library includes the combo driver / receiver cells and a full complement of power and support cells for both single-ended and differential signaling. This single pad set supports both the DDR2 and DDR3 signaling standards.
View SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V) full description to...
- see the entire SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V) datasheet
- get in contact with SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V) Supplier
SSTL IP
- SSTL_15 / SSTL_18 Combo I/O Pad Set
- SSTL_ I/O Pad Set
- SSTL_15 / SSTL_18 Combo I/O Pad Set
- DDRI/II/III/MDDR SSTL/HSTL combo interface without RTT (in-line) - TSMC 40nm 40LP (CLN40lp)
- DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 80nm GC (CLN80GC)
- DDRI/II/III SSTL/HSTL combo interface with RTT (square) - TSMC 90nm G (CLN90G)