Standard Compliant AMBA AHB SoC Interconnect, Soft IP

The AMBA® AHB interface is ideal for system that requires Multi-master, Multi- transaction, and back-to-back transactions. AHB supports the efficient communication between processors, on-chip memories and off-chip external memory interfaces with low-power peripheral devices. This AHB bus interface can be customized to support up-to 16 Masters and 16 Slaves. At any point of time on the bus arbitrator selects the Master selected to initiate the transaction AHB support single Read and Write as well as Burst transactions.

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