Standard digital, analog and oscillator IO

Features

• Standard digital, analog and oscillator IO
• Cell Size (Width * height) 30um * 155um with DUP stagger bonding pads
• Work voltage: 1.8V~3.3V power
• Robust whole chip multi-domain ESD solution with competitive cell size
• SMIC 0.040um Logic Salicide 1.1V/2.5V low leakage Process
• Suitable for 7, 8 and 9 layers application (single top metal)
• Suitable for 7, 8, 9 and 10 layers application (double top metal)