The Xelic SONET/SDH Tributary Payload Processor Core (XCSTPP12) performs tributary pointer processing, aligns outgoing tributaries and provides tributary path overhead error detection and performance monitoring. The XCSTPP12 implements the industry standard telecom bus architecture for interfacing of various signaling and data transfers with support for incoming parity checking and outgoing parity generation to ensure data integrity. Incoming/outgoing data is transferred at an STS-12/STM-4 rate using an 8-bit data bus operating at 77.76Mb/s.
SONET and SDH modes of operation are supported with flexible configurations and monitoring options available for control and visibility of individual tributaries. SONET mode provides the capability for processing STS-12 streams containing any legal mix of VT1.5, VT2, VT3, or VT6 tributaries. SONET tributary information is contained within virtual tributary groups (VT Group) of STS-1 or STS-3 level frame structures and combined to form an STS-12. Each VT group can be configured for 4xVT1.5, 3xVT2, 2xVT3, or 1xVT6. SDH mode provides processing for any legal mix of TU11, TU12, TU2 or TU3 tributaries. SDH STM-4 frames contain AU-3 and/or AU-4 structures that transport combinations of TUG-2 or TUG-3 frame structures. TUG-3’s can be configured to contain seven TUG2’s or a single TU3 tributary. TUG2’s can be configured for 4xTU11, 3xTU12, 2xSDH VT3 equivalent, or 1xTU2.
Configurable incoming multi-frame information is detected and analyzed to provide pointer locations for each tributary processed. Tributary pointer processing provides detection for loss of pointer (LOP-V/TU-LOP) and alarm indication signal (AIS-V/TU-AIS) conditions with optional interrupt capability available. Additionally, pointer justification (increment/decrement) events are tracked and reported.
Tributary payload processing supports the interpretation of path overhead bytes and provides detection of REI-V/LPREI, RFI-V/LP-RFI, UNEQ, Path Signal Label accepted and inconsistent, Path Trace accepted and inconsistent and RDI-V/LP-RDI conditions with optional interrupt capability. Path trace message lengths of 16 and 64 byte lengths are supported for all tributaries through internal register configuration.
Performance counters (configurable for bit or block count type) are provided for the accumulation of BIP-2/BIP-8 (TU-3) and REI-V/LP-REI errors for each tributary with BIP-2/BIP-8 programmable threshold capability for signal degrade (SD) and signal fail (SF) detection. Counters are configurable for saturating latch and clear operation or periodic error sync auto-update mode.
The XCSTPP12 provides outgoing tributary pointer generation and alignment with multi-frame synchronization available from an external input or through automatic internal generation. Transport (optional) and path (except H4) overhead blanking is provided for outgoing SONET/SDH frames (except STS-1’s in bypass mode).
A 16-bit generic register interface for access and configuration of internal memory mapped locations is included.