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STS-3/STS-12 MultiRate SONET/SDH Framer with GFP Processing
The Xelic SONET/SDH Multi-Rate Framer/GFP Mapper Core (XCS12CGM) aligns incoming SONET/SDH frames and provides transport overhead processing, path overhead processing, pointer processing, and GFP mapping in compliance with ITU-T G.7041/Y.1303 specifications.
The XCS12CGM contains independent SONET/SDH Transport Processor, Concatenated Path Processor, and Frame Mapped GFP Processor modules with a configuration option for STS-3/STM-1 or STS-12/STM4 SONET/SDH frame rates. Incoming/outgoing SONET/SDH data is transferred using a clock valid scheme with a line side clock rate up to 100Mb/s using an 8-bit data bus.
The XCS12CGM Transmit Transport Processor inserts transport overhead blanking, calculates and inserts framing, B1/B2 parity (with corruption capability), and scrambles SONET/SDH frames. An external DCC overhead port is provided to insert section and line DCC information into generated SONET/SDH frames. Diagnostics support includes optional corruption of inserted parity, LOS insertion, and scrambling enable/disable capability. MS AIS insertion is also provided. APS information is optionally insertion through input signaling. The Transmit Concatenated Path Processor inserts high order path overhead blanking, configurable Path Signal Label (C2 Byte) information, calculates and inserts B3 parity (with corruption capability), and supports pointer increments and decrements. Pointer SS bit field insertion is provided through input signaling. AISP can be forced through external signal control. The Transmit Frame Mapped GFP Processor encapsulates incoming client data and performs rate adaptation when GFP information is requested by the Transmit Concatenated Path Processor and system side client information is not available for transport. User control of GFP core header scrambling, FCS insertion, payload scrambling, and payload header type field insertion is provided though internal register programming. Independent counters are available to monitor the accumulation of client data and client management packets received in addition to the number of GFP control frames generated.
The XCS12CGM Receive Transport Processor contains a frame alignment unit with OOF and LOF algorithm state transitions. Incoming frames are descrambled (optional) and aligned for transport overhead processing. Transport overhead interpreters are implemented to detect error conditions which include LOS, LOF, OOF, B1 errors, B2 errors, and MS AIS. Diagnostics support includes optional corruption of calculated parity, and descrambling enable/disable capability. An external DCC overhead port is provided to extract section and line DCC information from generated SONET/SDH frames. APS information is extracted each frame and provided through output signaling. The Receive Concatenated Path Processor detects Path AIS, LOP, Pointer Increments, Pointer Decrements, Pointer NDFs, and Pointer 3 in a row conditions in addition to B3 error detection. The Receive Frame Mapped GFP Processor performs GFP frame delineation and provides a Server Signal Fail (SSF) output to indicate a fail condition. The delineator provides for a programmable in-frame count to achieve synchronization and allows for single bit core header error correction (optional) once this state is achieved. Control frames (idles), client data and client management packets, and invalid packets are detected and client information with all appropriate signaling is provided at system side interface. Single bit payload header errors are corrected (optional) to provide more reliable transport of client packet information. An FCS interpreter calculates the frame check sequence on each applicable incoming GFP frame and reports errors by detecting mismatches when comparing to extracted values. Independent counters are available through register interface access to monitor the accumulation of SSF errors, FCS errors, core header corrected frames, payload header corrected frames, payload header uncorrected frames, control frames, client management packets, client data packets, and client invalid packets.
The XCS12CGM contains independent SONET/SDH Transport Processor, Concatenated Path Processor, and Frame Mapped GFP Processor modules with a configuration option for STS-3/STM-1 or STS-12/STM4 SONET/SDH frame rates. Incoming/outgoing SONET/SDH data is transferred using a clock valid scheme with a line side clock rate up to 100Mb/s using an 8-bit data bus.
The XCS12CGM Transmit Transport Processor inserts transport overhead blanking, calculates and inserts framing, B1/B2 parity (with corruption capability), and scrambles SONET/SDH frames. An external DCC overhead port is provided to insert section and line DCC information into generated SONET/SDH frames. Diagnostics support includes optional corruption of inserted parity, LOS insertion, and scrambling enable/disable capability. MS AIS insertion is also provided. APS information is optionally insertion through input signaling. The Transmit Concatenated Path Processor inserts high order path overhead blanking, configurable Path Signal Label (C2 Byte) information, calculates and inserts B3 parity (with corruption capability), and supports pointer increments and decrements. Pointer SS bit field insertion is provided through input signaling. AISP can be forced through external signal control. The Transmit Frame Mapped GFP Processor encapsulates incoming client data and performs rate adaptation when GFP information is requested by the Transmit Concatenated Path Processor and system side client information is not available for transport. User control of GFP core header scrambling, FCS insertion, payload scrambling, and payload header type field insertion is provided though internal register programming. Independent counters are available to monitor the accumulation of client data and client management packets received in addition to the number of GFP control frames generated.
The XCS12CGM Receive Transport Processor contains a frame alignment unit with OOF and LOF algorithm state transitions. Incoming frames are descrambled (optional) and aligned for transport overhead processing. Transport overhead interpreters are implemented to detect error conditions which include LOS, LOF, OOF, B1 errors, B2 errors, and MS AIS. Diagnostics support includes optional corruption of calculated parity, and descrambling enable/disable capability. An external DCC overhead port is provided to extract section and line DCC information from generated SONET/SDH frames. APS information is extracted each frame and provided through output signaling. The Receive Concatenated Path Processor detects Path AIS, LOP, Pointer Increments, Pointer Decrements, Pointer NDFs, and Pointer 3 in a row conditions in addition to B3 error detection. The Receive Frame Mapped GFP Processor performs GFP frame delineation and provides a Server Signal Fail (SSF) output to indicate a fail condition. The delineator provides for a programmable in-frame count to achieve synchronization and allows for single bit core header error correction (optional) once this state is achieved. Control frames (idles), client data and client management packets, and invalid packets are detected and client information with all appropriate signaling is provided at system side interface. Single bit payload header errors are corrected (optional) to provide more reliable transport of client packet information. An FCS interpreter calculates the frame check sequence on each applicable incoming GFP frame and reports errors by detecting mismatches when comparing to extracted values. Independent counters are available through register interface access to monitor the accumulation of SSF errors, FCS errors, core header corrected frames, payload header corrected frames, payload header uncorrected frames, control frames, client management packets, client data packets, and client invalid packets.
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