Sub-2.5G: GFP Mapper

Features

• Core Features
• • Fully compliant with G.7041
• • Supports one channel with up to 256 logical channels based on Channel Identifier (CID)
• • Supports mapping of generic client packet data e.g. Ethernet, MPLS
• • Supports up to 2.5G transmission rates (10M/100M/1G/1.25G/2.5G)
• • GFP IDLEs are optionally inserted to facilitate rate adaptation or when client data is not available
• • Configurable GFP Header fields
• • Programmable core header, payload header, and extension header single bit error correction
• • Programmable per channel payload frame check sequence (pFCS) insertion and processing
• • Programmable extension header insertion per logical channel with error control field insertion and processing
• • Programmable payload area scrambling
• • Input port allows custom management frame generation
• • Out-of-band SSF/CSF/FDI/RDI/DCI signals on the client interface
• • In-band generation and detection of CSF/FDI/RDI/DCI management frames on line side interface
• • Received payload header values are captured in software readable registers
• • Generic FIFO-like client side interface
• • Line side interface connects seamlessly to Precise-ITC OTUK wrapper or to a generic FIFO-like Interface
• • 8-bit data width and supports up to core frequency of 350MHz depending on line side requirement. Please refer to Table 1.
• • Easy “plug and play” setup!
• Optional Features
• • Automatic 8, 12 or 64 byte Management Frame generation options
• • Software generated Client Management frames and Management Communication frames
• • Optional processor interface with 32-bit registers
• • Per channel Counters TX: frames sent, idle frames sent, client management frames sent
• • Per channel Counters RX: received frames, received idle frames, received client management frames, core header single-bit errors, core header multi-bit errors, payload header single-bit errors, payload FCS errors, extension header single-bit errors, extension header multi-bit errors

Block Diagram of the Sub-2.5G: GFP Mapper IP Core

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