Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Synchronous single-port, dual-port, and two-port register files
Novelics patented circuit technologies minimizes leakage current and active power in both the memory core and the peripheral circuits. In addition, the coolREG has been optimized to meet the performance requirements of very high speed applications such as processor cache.
The coolREG IP has been thoroughly simulated and validated in silicon to ensure the highest level of manufacturability. The MemQuest™ memory compiler has been verified and characterized to ensure the highest quality of deliverables.
Novelics coolREG™ embedded memory IPs are ideal solutions for System-on- Chip (SoC), ASIC, and ASSP applications requiring low-power, high-speed, and high-density configurable register files. Embedded coolREG delivers the best performance and power characteristics for small and fast Register File instances.
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register file IP
- Tuneable multi-port register file architecture
- TSMC CLN6FF Asynchronous Read Two Port Register File Compiler
- Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k
- Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k