The LogiCORE IP System Monitor Wizard for Virtex-6 and Virtex-5 FPGAs automates the task of instantiating the System Monitor block in your HDL design. The counterpart of the System Monitor block in Virtex-6 and Virtex-5 FPGAs in the 7 Series FPGAs is the XADC block, which can be configured using the LogiCORE IP XADC Wizard. The customization GUIs of both wizards make it easy for the user to configure these hardware blocks for the desired mode of operation.
- Easy configuration of required modes and parameters
- Simple interface for channel selection and configuration
- Ability to select/deselect alarm outputs and to set alarm limits
- Calculates all parameter and register values