NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
Time aligned Signal Generator core
It allows single, multi (configurable) and continuous pulse generation with configurable polarity, start time, interval and duty cycle.
The IP core comes with a Linux Driver
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Block Diagram of the Time aligned Signal Generator core IP Core

Signal Generator IP
- High performance 1.8V reference current and voltage generator
- 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
- 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
- 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
- TSMC 12 FFC PLL_Clock Generator / Clock Synthesizer, (Fractional / Integer, 4GHz / 8GHz)
- Integrated Bandgap - TSMC 7FF