English
You are here:
TSMC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon TSMC 0.15um Low Voltage Process High-Speed Synchronous Memory Compiler optimized for Taiwan Semiconductor Manufacturing Corporation (TSMC) 0.15m Logic Low Voltage 1P7M Salicide 1.2/3.3V process can flexibly generate memory blocks by a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon TSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
The compiler supports a comprehensive range of word and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon TSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
Features
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
View TSMC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler full description to...
- see the entire TSMC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler datasheet
- get in contact with TSMC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler Supplier