TSMC CLN12FFCLL 12nm Multi Phase DLL - 200MHz-1000MHz

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock. It delivers optimal jitter performance over a wide frequency range. The analog delay-line architecture used in our DLL design is internally isolated from supply noise for very low output jitter. The analog delay line also provides duty cyle correction.

• see the entire TSMC CLN12FFCLL 12nm Multi Phase DLL - 200MHz-1000MHz datasheet
• get in contact with TSMC CLN12FFCLL 12nm Multi Phase DLL - 200MHz-1000MHz Supplier