Turbo coding is an advanced error correction technique widely used in the communications industry. Turbo encoders and decoders are key elements in today's communication systems to achieve the best possible data reception with the fewest possible errors. The basis of turbo coding is to introduce redundancy in the data to be transmitted through a channel. The redundant data helps to recover original data from the received data. In data transmission, turbo coding helps achieve near Shannon limit performance.
Lattice provides a Turbo Decoder IP core that is both flexible and compliant with two different standards, 3GPP and CCSDS. 3GPP is widely used in WCDMA and MC-CDMA applications while CCSDS is most commonly found in telemetry and space communications.
Lattice also supplies users with a Turbo Encoder core providing users a complete state of the art error correction solution.
- Compliant with Standards:
- 3GPP TS 25.212 version 4.2.0
- CCSDS 101.0-B-5
- Throughput of 2Mbps for 3GPP at 30MHz, 7 Iterations
- Two's Complement Data/Parity Input
- Supports Depuncturing
- Variable Soft-Widths for Input Symbols, Branch Metrics, Path Metrics and LLRs
- User-Defined Number of States
- Variable Block Sizes During Runtime
- Programmable Number of Iterations
- Optional Hard Decision Storage
- Selectable Max-Log-Map or Log-Map Algorithm
- Programmable Pipe Stages for Convenient Memory Interfacing
- Optional Double Buffering
Block Diagram of the Turbo Decoder IP Core