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UHF Passive RFID Front-End - EPCGlobal Class 1 Gen 2/ISO18000-6C Compliant Silterra 0.18 μm
This macro-cell is an ultra low power analog/RF front-end core designed for SilTerra 0.18µm CL180G CMOS technology. It is ideal for use in passive UHF RFID integrated circuits compliant with EPCGlobal Class 1 Gen 2/ISO18006-C standards. The circuit features a complete analog/RF frontend including rectifier, demodulator, backscattering modulator, a power management unit (PMU) and a short-term memory (STM) that generates the persistence flags. The PMU includes an output supply voltage limiter, internal voltage and current references, built-in power-on-reset (POR), and oscillator. Internal blocks are trimmable via a digital word that can reside in the non-volatile memory of the chip.
Features
- -12dBm Read Sensitivity
- Output supply voltage from 1 to 1.8V
- Internal 1.12V voltage reference
- Internal 17.5nA current bias
- Internal 2MHz oscillator
- Built-in POR
- Persistence flags generator
- Current consumption: 1.5µA
Deliverables
- Datasheet/Integration Guide
- HDL Model
- Flat GDSII database/LVS netlist
- Customer Support
Applications
- Active/Passive EPCGlobal C1G2
Block Diagram of the UHF Passive RFID Front-End - EPCGlobal Class 1 Gen 2/ISO18000-6C Compliant Silterra 0.18 μm
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