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SweRV Core EL2, Single issue, embedded RISC-V core with 4-stage pipeline
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Ultra-compact Single-Channel JPEG 2000 encoder
The JPEG 2000 encoder IP core is an ultra-compact JPEG2000 hardware encoder optimized for single-channel HD and DCI video applications.
The IP core is optimized for silicon cost and is able to encode 720p30/60, 1080i and 1080p30/60, 2K@24fps, 2K@48fps, 2K3D@24fps, on single entry-level FPGA solutions.
The ultra-compact JPEG2000 encoder is mapped on the smallest FPGA devices such as Artix7 from Xilinx or Cyclone5 from Altera.
We provide extensive systems integration and design services and integrate a wide range of IP cores like HDMI, Ethernet MACs, JPEG 2000, crypto and high-performance memory controllers
The IP core is optimized for silicon cost and is able to encode 720p30/60, 1080i and 1080p30/60, 2K@24fps, 2K@48fps, 2K3D@24fps, on single entry-level FPGA solutions.
The ultra-compact JPEG2000 encoder is mapped on the smallest FPGA devices such as Artix7 from Xilinx or Cyclone5 from Altera.
We provide extensive systems integration and design services and integrate a wide range of IP cores like HDMI, Ethernet MACs, JPEG 2000, crypto and high-performance memory controllers
Features
- DCI: 2K@24fps, 2K@48fps, 2K3D@24fps
- HD: 720p30/60, 1080i, 1080p30/60
- Customizable output bit rate: up to 250Mbps / 500Mbps
- XYZ, RGB, YUV (4:4:4 or 4:2:2) color spaces with support for ICT/RCT color transform
- Wavelet filters: 9/7 and 5/3, 0 to 6 decomposition levels
- Full-frame encoding (no tiling)
- Pixel depth: up to 12 bits per color sample
- Configurable bit rate on a frame by frame basis with 3 selectable regulation modes
- Minimal user intervention
Benefits
- Quality: support of untiled images for HDTV
- Flexibility: support for the widest spectrum of JPEG 2000 options and easy to integrate interface
- Compactness: ultra-compact, smallest FPGA solution
Applications
- HD local video distribution
- Consumer
- Digital cinema
- Production
- Acquisition
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JPEG 2000 encoder IP
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