Ultra Low Area Frequency Synthesizer PLL (5nm - 90nm)

Features

• 5MHz up to >800MHz input frequency range
• 8MHz up to 1.6GHz output frequency range, higher in advanced processes
• Tiny footprint (0.015mm^2 in 40nm)
• Uses core voltage only
• Extremely Low power (<1mW @ 400MHz)
• Low jitter: Period Jitter < 1ps RMS
• Built-in supply decoupling
• Simple digital control interface
• Optional Spread Spectrum clock generation capability

Benefits

• PLL design is ideal for digital core clocking -- tiny size and core voltage only enables placement anywhere
• PLL can be programmed for lowest jitter or lowest power
• No external components required
• No additional supply decoupling required
• Loop automatically adjusts for any input frequency, so no complicated programming is required

Deliverables

• GDSII
• CDL Netlist (MG Calibre Compatible)
• Functional Verilog Model
• Liberty timing models (.lib)
• LEF
• Application Note

• see the entire Ultra Low Area Frequency Synthesizer PLL (5nm - 90nm) datasheet
• get in contact with Ultra Low Area Frequency Synthesizer PLL (5nm - 90nm) Supplier