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NB-IoT Protocol Stack IP (3GPP CAT-NB1, L1-L3 and Service Layer)
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Ultra-Low-jitter Ring PLL
Integer PLL combines low area with wide range and very low jitter for clocking AFEs and providing reference sources for High-speed serial links
Widely Programmable Integer PLL is a multi-function, general purpose frequency synthesizer. The design is optimized to provide ultra-low jitter making this PLL suitable for clocking fast AFEs and high-end SerDes circuits. Ultra-wide input and output ranges along with best-in-class jitter
performance allow the PLL to be used for almost any clocking application. With excellent supply noise immunity, the PLL is ideal for use in noisy mixed signal SoC environments.
Widely Programmable Integer PLL is a multi-function, general purpose frequency synthesizer. The design is optimized to provide ultra-low jitter making this PLL suitable for clocking fast AFEs and high-end SerDes circuits. Ultra-wide input and output ranges along with best-in-class jitter
performance allow the PLL to be used for almost any clocking application. With excellent supply noise immunity, the PLL is ideal for use in noisy mixed signal SoC environments.
Features
- 10MHz up to 160MHz input frequency range
- 78MHz up to 1.25GHz output frequency range
- Integrated Long Term Jitter below 1ps RMS -- meets requirements for 16Gbps SerDes reference clock
- Differential output simplifies output routing
- Separate supply domains for optimal jitter isolation in noisy SoC environments
- Auto-calibration of offsets to cancel reference spur
Benefits
- No external components required
- No additional supply decoupling required
Deliverables
- GDSII
- CDL Netlist (MG Calibre Compatible)
- Functional Verilog Model
- Liberty timing models (.lib)
- LEF
- Application Note
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