English
MIPI I3C Controllers - Dual Role Master (70016); APB I3C Slave (70002), Generic I3C Slave
You are here:
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.
View UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral. full description to...
- see the entire UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral. datasheet
- get in contact with UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral. Supplier
Memory Compiler
- sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
- sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
- sROMet compiler - Memory optimized for high density and high speed - compiler range up to 2M
- Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
- Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
- Single Port, Ultra High Speed, GF 22FDX, SRAM Memory Compiler