The INNOSILICON USB 2.0 OTG PHY is fully compliant with UTMI+ level 3 Rev 1.0 specification. Offering excellent performance combined with a die size up to 30% less than the competition, this PHY is the perfect companion for your design. The impressively small die size offers all functionality needed for a complete USB solution. HS, FS and LS support with OTG along with all required I/O's, primary and secondary ESD, self-calibrated DP/DM termination and an integrated PLL. The low latency of this design supports Hub mode with a 40 bit time round trip delay.
If your solution requires more than one USB port, a further size efficiency can be had by choosing a multiport solution. The INNOSILICON USB 2.0 PHY is available is 1, 2, 3 and 4-port configurations.
To support production test with high coverage, this PHY includes BIST, loop back, and boundary scan functionality.
- Fully compliant with USB Rev 2.0, OTG and Hub supplements
- Supports the following applications:
- - Host
- - Device
- - Hub
- Small die size with low power
- Supports low latency hub mode with 40 bit time round trip delay
- 8 bit or 16 bit UTMI interface compliant with UTMI+ specification level 3 Rev 1
- Scan and Loop back BIST modes supported
- Crystal oscillator input included
- Integrated phase-locked loop (PLL) oscillator
- Self-calibrated termination resistance
- Built-in I/O and ESD structure
- Support for FPGA integration
- As with all Innosilicon IP, the focus is on silicon proven, fully certified solutions providing:
- Small size
- Low power
- High ATE coverage
- Simple integration
- Flexible customization