USB 3.0 Device Upgrade IP Core
We provides designers with a comprehensive, silicon-proven configurable digital USB 3.0 Device solution that conforms to the SuperSpeed specification. The USB 3.0 Device Upgrade is offered to customers with a USB 2.0 Device product interested in adding USB SuperSpeed (5Gbps) capability. It is designed to seamlessly upgrade existing USB 2.0 designs to the USB 3.0 specification for SoC development.
The USB 3.0 Device Upgrade provides a dedicated dual simplex, routable packet architecture for USB3.0 packet transfers, with a disable option for power savings. The USB 3.0 Upgrade IP supports all power management features as well as a dedicated link manager for each downstream port for increased efficiency. It includes a high performance scatter gather DMA that can be configured to access any endpoint through registers. Optionally, it can interface with an external DMA controller.
The USB 3.0 Device Upgrade IP core provides a PIPE interface for USB 3.0 support. The USB 3.0 IP utilizes a flexible system bus architecture that can support AXI, AHB, OCP or any custom system interface needed for existing SoC development. The system bus can also be replaced with a dedicated FIFO interface to reduce bus bandwidth issues. The IP core includes RTL code, test scripts and a test environment for complete design verification.
View USB 3.0 Device Upgrade IP Core full description to...
- see the entire USB 3.0 Device Upgrade IP Core datasheet
- get in contact with USB 3.0 Device Upgrade IP Core Supplier
Block Diagram of the USB 3.0 Device Upgrade IP Core IP Core
interface controller & PHY IP
- Synopsys 1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
- Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
- PCIe 6.1 Controller
- PCIe 5.0 Controller with AMBA AXI interface
- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm