USB 3.0 OTG High / Full / Low- Speed Dual Role IP Core
(1.5Mbps). USB 3.0 Controller IPs are based on a nextgeneration unified architecture which is designed directly for USB 3.0 specification and optimized intensively for logic sharing.
View USB 3.0 OTG High / Full / Low- Speed Dual Role IP Core full description to...
- see the entire USB 3.0 OTG High / Full / Low- Speed Dual Role IP Core datasheet
- get in contact with USB 3.0 OTG High / Full / Low- Speed Dual Role IP Core Supplier
Block Diagram of the USB 3.0 OTG High / Full / Low- Speed Dual Role IP Core

USB IP IP
- USB 3.0 femtoPHY in TSMC (28nm, 16nm, 12nm)
- USB 3.0 femtoPHY, Type-C in TSMC (28nm, 16nm, 12nm)
- USB 3.0 PHY in TSMC (65nm, 55nm, 40nm, 28nm)
- USB 3.1 PHY (10G/5G) in TSMC (16nm, 12nm, 7nm, 5nm)
- USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
- Complete USB Type-C Power Delivery PHY, RTL, and Software