400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
USB 3.0 SATA 3.0 PCIe 2.0 XAUI MultiPHY GF 55LPX
High data rates are accurately achieved through fully programmable TX drivers and auto-calibrated on-die terminations.
The design is completely self-contained including: IO pads, primary and secondary ESD enabling simple integration.
This Multi-SERDES PHY has been designed with DFT in mind by incorporating at-speed BIST, loopback and boundary scan.
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