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PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
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USB 3.0 SATA 3.0 PCIe 2.0 XAUI MultiPHY TSMC 55/65GP/LP
The Innosilicon Multi-SERDES PHY is a highly configurable design that supports SATA3, PCIe2, USB3.0 and XAUI with full compliance. It is available in multiple technologies today and can be ported into your technology of choice.
High data rates are accurately achieved through fully programmable TX drivers and auto-calibrated on-die terminations.
The design is completely self-contained including: IO pads, primary and secondary ESD enabling simple integration.
This Multi-SERDES PHY has been designed with DFT in mind by incorporating at-speed BIST, loopback and boundary scan.
High data rates are accurately achieved through fully programmable TX drivers and auto-calibrated on-die terminations.
The design is completely self-contained including: IO pads, primary and secondary ESD enabling simple integration.
This Multi-SERDES PHY has been designed with DFT in mind by incorporating at-speed BIST, loopback and boundary scan.
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