Bluetooth 5.1 low energy Baseband Controller, software and profiles
USB 3.0 SATA 3.0 PCIe 2.0 XAUI MultiPHY TSMC 55/65GP/LP
High data rates are accurately achieved through fully programmable TX drivers and auto-calibrated on-die terminations.
The design is completely self-contained including: IO pads, primary and secondary ESD enabling simple integration.
This Multi-SERDES PHY has been designed with DFT in mind by incorporating at-speed BIST, loopback and boundary scan.
Features
- Compliant with SATA3(6Gb/s), PCIe2(5Gb/s), USB3.0(5Gb/s) and XAUI(3.125Gb/s)
- TX drivers are programmable for amplitude, slew rate and de-emphasis to ensure a 200mV to 800mV signal window as appropriate.
- On-die terminations are auto-calibrated during handshake for both value and matching
- Incorporates spread spectrum clocking (SSC) for all interface implementations with control for spectrum offset, range shape and skew rate
- Embedded primary & secondary ESD protection
- Integrated IO pads
- Production test support is optimized through high coverage at-speed BIST, loopback and boundary scan support
Benefits
- Low power consumption
- Fully customizable
- Small area
- Simple integration process
- Available options include:
- Test chips and test boards
- FPGA integration support
- Chip level integration support
Applications
- Portable hard or flash drive
- Video Camera
- High speed fiber/copper backplane
- High speed backplane device
- Internal hard drive
View USB 3.0 SATA 3.0 PCIe 2.0 XAUI MultiPHY TSMC 55/65GP/LP full description to...
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