USB 3.1 Device controller is a highly configurable core and
implements the USB 3.1 Device functionality that can be interfaced
with third party USB 3.1 PHY’s. USB3.1 Device controller core is part of USB3.0 family of cores named “Pravega”.
The Pravega Device Controller core is architected with an high
performance DMA engine based on USB3.1 specification.
The Pravega Device Controller core is carefully partitioned to support standard power management schemes which include extensive clock gating and multiple power wells for aggressive power savings required for mobile and handheld applications.
The controller has a very simple application interface which can be
easily adapted to standard on-chip-bus interfaces such as AXI,
AHB, OCP as well as other standard off-chip interconnects making
it easy to be integrated in a wide range of applications.
The Controller also has a dedicated PHY Type-C connector Interface for identifying Type-C specific features such as cable orientation, ID function based on Configuration data channel etc.