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USB 3.1 SuperSpeed+ (Gen2) Dual-Role Device Controller (USB-IF Certified)
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USB 3.1 PHY Device/Host/OTG/Hub TSMC 40LP
The 10G inno PHY provides four full-duplex transceivers with raw Physical Coding Sublayer (PCS)
and Physical Medium Attachment (PMA). The PHY is structured using full-duplex (transmitter and
receiver), which includes features such as: Data serialization and de-serialization, 128b/132b encoding, analog buffers, elastic buffers and receiver detection.
and Physical Medium Attachment (PMA). The PHY is structured using full-duplex (transmitter and
receiver), which includes features such as: Data serialization and de-serialization, 128b/132b encoding, analog buffers, elastic buffers and receiver detection.
Features
- Supports 10.0Gb/s serial data transmission rate
- Supports plug in two orientations
- Utilizes 8-bit, 16-bit or 32- bit parallel interface to transmit and receive USB SuperSpeed+ data
- Allows integration of high speed components into a single functional block as seen by the device designer.
- Data and clock recovery from serial stream on the USB SuperSpeed+ bus
- Holding registers to stage transmit and receive data
- Supports direct disparity control for use in transmitting compliance pattern
- 8b/10b encode/decode and error indication
- 128b/130b encode/decode and error indication
- Receiver detection
- Low Frequency Periodic Signaling ( LFPS) Transmission
- Selectable Tx Margining
Benefits
- As with all Innosilicon IP, the focus is on silicon proven, fully certified solutions providing:
- Small size
- Low power
- High ATE coverage
- Simple integration
- Flexible customization
Applications
- Application processor interfaces
- PCB Embedded devices
View USB 3.1 PHY Device/Host/OTG/Hub TSMC 40LP full description to...
- see the entire USB 3.1 PHY Device/Host/OTG/Hub TSMC 40LP datasheet
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