USB 3.2 Gen1X1 PHY IP in TSMC(7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm, 65nm)

M31 USB3.2 Gen1X1 transceiver IP provides a complete range of USB3.2 Gen1X1 host and peripheral applications. It is compliant with the PIPE 4.0 and UTMI+ specification. The USB3.2 Gen1X1 IP integrates high-speed mixed signal circuits to support super-speed traffic at 5Gbps and is backward compatible to high-speed data rate at 480Mbps, full-speed data rate at 12Mbps and low-speed data rate at 1.5Mbps.

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