The USB 4.0 Host controller IP is a highly configurable core and implements the USB 4.0 Host functionality that can be interfaced with third party USB 4.0 PHY's.
The Host Controller core is carefully partitioned to support standard power management schemes which include extensive clock gating and multiple power wells for aggressive power savings required for mobile and handheld applications. The controller has a very simple application interface which can be easily adapted to standard on-chip-bus interfaces such as AXI, AHB, OCP as well as other standard off-chip interconnects making it easy to be integrated in a wide range of applications. USB 4.0 Host Initial Versions; -A single downstream USBv4 Port -PCIe Host Interface Adaptor -No DP Source or PCIe Controller
- Configurable Number of Downstream USBv4 Ports
- Optional support for DP Source Adaptor
- Optional support for PCIe Down Adaptor
- PCIe based host interface adaptor with support for RAW and Frame mode.
- Configurable option to exclude xHCI Controller and USB3 Down adaptor.
- Optionally a reference firmware running on micorblaze for emulating connection manager for very simple topology.
- Supports USB4 Gen 2x2 (20 Gbps) and USB4 Gen 3x2 (40 Gbps) Links.
- Optional support for thunderbolt Gen 2 (10.3125 Gbps) & Gen 3 (20.625 Gbps) rates.
- Optional bypass mode to support native USB v3.2
- Support for Alt Mode and Billboard class via USB2 controller.
Block Diagram of the USB 4.0 Host Controller IP IP Core