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USB based High Speed System Debug IP
Architecture Independent Design
Supports any AMBA AHB based System
Easily portable to other buses such as Avalon
Standard USB 2.0 interface to the Host
Independent of System Memory Map
Detects Instruction and Data Abort Exceptions
Dumps instruction and data address along with PC value
Supports unlimited System Memory sizes
Works at system bus frequency
Supports any AMBA AHB based System
Easily portable to other buses such as Avalon
Standard USB 2.0 interface to the Host
Independent of System Memory Map
Detects Instruction and Data Abort Exceptions
Dumps instruction and data address along with PC value
Supports unlimited System Memory sizes
Works at system bus frequency
Features
- Interactive and easy to use GUI
- Provides full visibility to – Register file, Stacks, Flags and memories during run-time in GUI
- Provides write ability to modify register/memory content
- Control over program flow without use of GDB and JTAG
- 40 times faster than JTAG based debug tools
- No need for external adapters to communicate to target
- Unlimited number of calls to flag/register/memory probe functions
- No need to reset/program FPGA/ system every time after change in
- code – reduces debug cycle times
- Quick and easy identification of race conditions
- System Memory probe functions
- - Can be used in any of the processor’s modes
- Useful in identifying and solving synchronization issues in polling
- based hardware
- Can be used in ASIC and FPGA based systems
- Low resource utilization – simple and compact design
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