The SS V9025OCP core implements all the capabilities of OTG Dual-Role Device (DRD). The core is designed for easy integration into any SoC applications. The SSV9025OCP has two different OCP buses, Configuration bus and System bus. Configuration bus is mainly used for initialization and configuring the Operational registers. System bus is used by DMA for data transfers to/from system memory. The Core can be used either in host mode or peripheral mode based on the connectivity and application requirements. In host mode, the Host Controller Driver and Host controller work in tandem to transfer the data between client software and a USB device. In peripheral mode the device drivers will control the device functionally. The core is mainly divided into 5 blocks. Config block interfaces with the config bus and performs the read/ write operations to operational registers.