USB3.1 PHY
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USB3.1 IP
- USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
- Combo SerDes PHY
- Low Jitter 1.25GHz to 2.5GHz Quadrature Output PLL
- Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 28HPC process
- Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in GF 28SLP process
- Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 55LP process