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V-by-One Rx &Tx
The SDI Subsystem is a highly optimised Xilinx FPGA IP Core to allow the conversion of any SMPTE Serial Digital Interface video data stream into an AXI4-Stream with support for single link (up to 12G-SDI), dual link (up to 6G-SDI) and quad link (3G-SDI). This IP comes as independent Rx and Tx Subsystems. The Rx Subsystem decodes an SDI video stream into a neutral AXI4-Stream and the Tx Subsystem encodes a neutral AXI4-Stream into the chosen SDI video stream format.
Features
- Very small FPGA resource foot print
- Very low output latency
- 1 to 16 Lane interface with fully configurable data sampling and section modes
- Support for image sizes up to 4096 x 2160 at frame rates up to 120 fps
- Independent transceiver PHY to allow ease of integration into different designs and packages
- Full data buffering to allow input and output to operate in different clock domains
- Available as an independent IP Core
- Fully integrated into Omnitek’s Projector solution
- Available as reference design
- Fully compatible with other Omnitek IP Cores such as the Omnitek Scalable Video Processor (OSVP)
Applications
- Display screen interfaces
- Multi-screen displays
- Interactive display systems
- Monitoring equipment
- Virtual Reality Headsets
- Automotive displays
Block Diagram of the V-by-One Rx &Tx IP Core
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