English
You are here:
V-By-One Transmitter IP
VBYONE Transmitter core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a wide range of low-cost devices. VBYONE Transmitter IIP is proven in FPGA environment. The host interface of the VBYONE can be AHB, AHB-Lite, APB, AXI, AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or custom buses.
View V-By-One Transmitter IP full description to...
- see the entire V-By-One Transmitter IP datasheet
- get in contact with V-By-One Transmitter IP Supplier
vbyone receiver ip IP
- 1.5Gbps 20-Lane LVDS Receiver PHY IP (Silicon Proven in TSMC 28HPC+)
- V-by-One Receiver PHY IP (Silicon Proven in SMIC 40LL)
- 0.6G-4Gbps V-by-One/LVDS Receiver PHY IP (Silicon Proven GF 22FDX)
- V-by-one(VBO) high speed receiver(RX) (includes PMA, PCS, and controller).
- V-By-One Receiver IP
- V-by-One 1.4 Receiver