VeriSilicon SMIC 0.18μm Low Leakage Process Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18μm Logic 1P6M Salicide 1.8/3.3V Low leakage process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word length and bit length. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon SMIC 0.18μm Low Leakage Process Synchronous Via1 ROM compiler uses three metal layers within the blocks and supports metal 4, 5 or 6 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.