This is a very high speed 8 state 3GPP LTE compatible parallel concatenated turbo encoder.
- 8 state 3GPP LTE compatible turbo encoder
- Rate 1/3
- 40 to 6144 bit interleaver
- Up to 302 Mbit/s encoding speed
- Parallel encoded data out
- Available as EDIF core and VHDL simulation core for Xilinx Virtex-II, Spartan-3, Virtex-4, Virtex-5, Virtex-6 and Spartan-6 FPGAs under SignOnce IP License. Actel, Altera and Lattice FPGA cores available on request.
- Available as VHDL core for ASICs
- Low cost university license also available
- All Licenses
- EDIF Core
- VHDL Simulation Core
- Test vector generation software
- VHDL ASIC License
- VHDL Core
- C++ bit/cycle exact simulation model