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VESA DSC 1.2b Frame Buffer Compression IP Subsystem
This subsystem targets TCON and PCON ICs with eDP 1.4b /eDP 1.5 / DP 2.0 interfaces and supporting Panel Self Refresh (PSR1/PSR2) or Panel Replay. It enables a frame buffer area reduction of 66% and more.
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Block Diagram of the VESA DSC 1.2b Frame Buffer Compression IP Subsystem
VESA DSC IP
- VESA DSC (Display Stream Compression) 1.2b Video Encoder
- VESA DSC (Display Stream Compression) 1.2b Video Decoder
- VESA DSC Encoder
- VESA Display Stream Compression (DSC) IP Core
- MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between application processor and displays
- MIPI DSI-2 Total IP Solution with VESA DSCv1.2