WebM’s G2 VP9 Decoder IP is the latest addition to WebM family of hardware IP products for multimedia system-on-chip designs. G2 is the first decoder IP to implement VP9 in hardware, delivering next-generation performance and power efficiency, and enabling up to 4K (2160p 60FPS) resolution playback on smart TVs, PCs and post-PC consumer devices.
As with our VP8 hardware IPs, G2 is currently available to semiconductor companies having firm plans to ship VP9-supporting products. A written, no-cost agreement is required.
- Decoding of VP9 bitstreams with YCbCr 4:2:0 color format
- 8-bits per color channel
- Maximum decodable frame resolution: 4096 x 2304 pixels
- Output frame formats:
- Reference frame: YCbCr4:2:0 Semi-planar 4x4 tiled format
- Post-processed output frame: YCbCr4:2:0 raster scan format
- SoC connectivity:
- 64/128 bit AXI master
- AXI, AHB or APB slave
- Configurable endianness
- WebM G2 enables 4K (2160p) VP9 playback on high-end consumer devices. The design is scalable to meet up to 2160p@60fps decode requirements with a single core, minimizing the silicon area and decoding latency.
- The standard G2 delivery package includes all required source code to integrate the decoder with the actual SoC.
- VHDL or Verilog source code
- Driver source code in ANSI C, including API for application integration
- Software test bench
- RTL test bench
- Comprehensive test suite for SoC integration and verification
- Synthesis script templates for Synopsys Design Compiler
- Youtube playback on consumer devices, such as DTV, STB, smart phones and tablets.
Block Diagram of the WebM VP9 Hardware Decoder IP Core