The XADC Wizard is provided under the terms of the Xilinx End User License and is included with ISE and Vivado software at no additional charge.
Xilinx provides an easy to use wizard to configure the on-chip XADC analog to digital converter block in 7 series FPGAs.
The LogiCORE™ IP XADC Wizard for 7 Series FPGAs automates the task of configuring the XADC analog to digital conversion block in 7 series FPGAs to your desired mode of operation with an a intuitive customization GUI. The GUI generates an HDL wrapper with all the configuration attribute settings you need, providing an easy way to integrate the XADC block into your HDL design.
- Easy configuration of required modes and parameters (ADC conversion rate, calibration settings, DRP interface, etc.)
- Simple interface for channel selection and configuration
- Ability to select/deselect alarm outputs and to set alarm limits for temperature and voltage levels
- Calculates all required parameter settings and register values from user inputs
- Example design demonstrates the integration process and design flow to get users up to speed quickly
- Optional AXI4 Lite and AXI4-Streaming in Vivado supported version
- Optional 12 bit temperature output port