The XPS HWICAP (Hardware ICAP) IP enables an embedded microprocessor, such as the MicroBlaze™ or PowerPC™ to read and write the FPGA configuration memory through the Internal Configuration Access Port (ICAP) at run time, which enables a user to write software programs for an embedded processor that modifies the circuit structure and functionality during the circuit’s operation.
- PLB v4.6 based PLB interface
- Partial bitstream loading is possible
- Enables Read/Write of CLB LUTs
- Enables Read/Write of CLB Flip-Flop properties
- ICAP interface operates at clock rate of PLB
- Support for MicroBlaze and PowerPC embedded processors