Industry Articles
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Do we need an international EDA roadmap?
(Thursday, September 9, 2010)
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Debugging the Linux kernel with JTAG
(Tuesday, September 7, 2010)
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Accelerating the Development of TLM-2.0 Models Using Model Authoring Kits (MAKs)
(Monday, September 6, 2010)
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Evaluating platform software architectures for nextgen embedded multicore designs
(Wednesday, September 1, 2010)
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Power Management: Designing from a System-level Perspective
(Tuesday, August 31, 2010)
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Dual core architectures in automotive SoCs
(Thursday, August 26, 2010)
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How audio processing algorithms help improve sound from small speakers
(Thursday, August 26, 2010)
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Extreme Design: Realizing a single-chip CMOS 56 Gs/s ADC for 100 Gbps Ethernet
(Thursday, August 26, 2010)
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Commentary: How strong are your IP assets?
(Thursday, August 26, 2010)
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Harness speed, performance, signal integrity, and low current advantages of 65nm QDR family SRAMs
(Tuesday, August 24, 2010)
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Reusable Device Simulation Models for Embedded System Virtual Platforms
(Monday, August 23, 2010)
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System Verilog configurable coverage model in an OVM setup - concept of reusability
(Monday, August 23, 2010)
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How throughput enhancements dramatically boost 802.11n MAC efficiency--Part II
(Thursday, August 19, 2010)
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Using switched capacitors to create programmable analog logic blocks in mixed-signal designs
(Wednesday, August 18, 2010)
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Reusability, usability and flexibility
(Wednesday, August 18, 2010)
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How to use FireWire for innovative new designs without distance constraints
(Wednesday, August 18, 2010)
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A case for not choosing the latest components
(Wednesday, August 18, 2010)
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Comparing AMBA AHB to AXI Bus using System Modeling
(Thursday, August 12, 2010)
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How throughput enhancements dramatically boost 802.11n MAC efficiency--Part I
(Wednesday, August 11, 2010)
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Reduce embedded SoC design cost & optimize IP integration
(Tuesday, August 10, 2010)
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FPGA compilation on-site or in the cloud
(Monday, August 9, 2010)
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Picking the right built-in self-test strategy for your embedded ASIC
(Thursday, August 5, 2010)
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Use XML to build ASIC or SoC design specifications
(Wednesday, August 4, 2010)
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Using in-design physical verification to reduce tapeout schedules
(Monday, August 2, 2010)
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The ripple effect
(Thursday, July 29, 2010)
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Generating AMD microcode stimuli using VCS constraint solver
(Monday, July 26, 2010)
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Protect your goal with post-silicon formal verification
(Friday, July 23, 2010)
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Give the people what they want: HLS for RTL verification
(Wednesday, July 21, 2010)
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Real Time Non-intrusive Debugging Framework
(Monday, July 19, 2010)
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Customized FPGA board for ASIC Prototyping - A novel approach with Predesigned Blocks and Modular FPGA
(Thursday, July 15, 2010)
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MIPI M-PHY takes center stage
(Tuesday, July 13, 2010)
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SuperSpeed USB (USB 3.0): More than just a speed increase
(Monday, July 12, 2010)
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Can MIPI and MDDI Co-Exist?
(Friday, July 9, 2010)
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How productive is your R&D organization?
(Thursday, July 1, 2010)
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Efficient 'C' Programming and its Effect on the Performance of Embedded Systems
(Monday, June 28, 2010)
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How to make virtual prototyping better than designing with hardware: Part 2
(Wednesday, June 23, 2010)
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How to make virtual prototyping better than designing with hardware: Part 1
(Wednesday, June 23, 2010)
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Multiplexed Energy Metering AFEs Ease ASIC Integration and Provide Significant Cost Reduction
(Monday, June 21, 2010)
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System Verilog based Generic Verification Methodology for IPs/ASICs/SOCs: A Case Study
(Monday, June 21, 2010)
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Viewpoint: Debug will get your attention, sooner or later
(Thursday, June 17, 2010)
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Advancing Network Packet Management and Security Using Silicon Based Subsystem IP Solutions
(Thursday, June 17, 2010)
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Power analysis of clock gating at RTL
(Monday, June 14, 2010)
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Low Power Verification of Connectivity IP cores - a USB HS-OTG Case Study
(Monday, June 14, 2010)
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Repeatable results with design preservation
(Thursday, June 10, 2010)
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Time is right for clockless design
(Thursday, June 10, 2010)
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Creating Virtual Platform using The OCP-IP Modeling kit
(Monday, June 7, 2010)
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Softsilicon - the next era of communications silicon
(Monday, June 7, 2010)
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A look back at the last 10 years of chip design
(Thursday, June 3, 2010)
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A monitor-based approach to verification
(Wednesday, June 2, 2010)
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Building Cost Effective and Robust SoC-based Network Appliances
(Tuesday, June 1, 2010)
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